What are the reasons/motivation for this change?

$macc is needlessly complex: the CONFIG parameter uses a convoluted encoding, and it has a redundant B port for single-bit summands.

With $macc_v2 the goal is to make it simpler, so much so that it's not unreasonable to write techmap rules matching on this cell in plain Verilog (as opposed to just deferring to maccmap).

Explain how this is achieved.

Changes done in v2:

• use "terms" instead of "ports" to label individual summands (to remove confusion with RTLIL-level ports)
• use simple encoding for parameters (akin to $mem_v2, which similarly encodes a dynamic number of read/write ports)
• remove the original B port semantics, instead use A/B ports to split the two operands for each product

Based off #4817, which can go in first to make this one easier to review.

TODO:

• decide on the final shape of $macc_v2
• add satgen support
• add consteval support
• fix techmap.v
• test all basic scenarios
• add simlib model
• find the "adding a new cell" checklist
• make booth work
• Add to kernel/celltypes.h (incl. eval() handling for non-mem cells)
• Add to InternalCellChecker::check() in kernel/rtlil.cc
• Add to techlibs/common/simlib.v
• Add to techlibs/common/techmap.v
• Add to docs/source/CHAPTER_CellLib.rst (or just add a fixme to the bottom)
• Maybe add support to the Verilog backend for dumping such cells as expression